1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the semiconductor device, and in particular to a semiconductor device and a method of fabricating the semiconductor device capable of embedding or mounting large-capacity passive elements such as a decoupling capacitor.
2. Description of the Related Art
A technique for modularizing a plurality of IC chips and passive elements such as an inductor, capacitor and resistor on a single plane has long been adopted in the field of hybrid ICs. This technique was, however, not so advantageous in terms of attainable size and cost, because IC chips and passive elements were mounted on a printed board or ceramic substrate in a form of packaged chip.
As measures for satisfying a need for miniaturization, memory-chips developed thereafter and put into practical use for memory chips for laptop computers and mobile telephones have configurations shown in FIGS. 15 through 17, which relate to a flip-chip structure in which bear IC chips 2 are mounted upside down (face-down) on a substrate which is a printed board or a ceramic substrate, while placing external terminals 3 in between (FIG. 15); a multilayer chip structure in which the IC chip 2 is stacked on the substrate 1 and bonded thereto through wires 4 (FIG. 16); and an interposer-type multilayer substrate structure in which the substrates 1 having the IC chip 2 mounted thereon are stacked while placing connection terminals 5 in between (FIG. 17).
Besides the conventional structures shown in FIGS. 15 through 17, other efforts have been made in order to cope with multi-chip modularization for high-frequency devices, by which inductors (L), capacitors (C) and resistors (R) are fabricated in an organic substrate or an inorganic substrate to thereby form a filter circuit, Barun circuit or switch circuit.
The capacitor (C) fabricated in the organic substrate, however, cannot use high-dielectric-constant materials since it is not durable against high-temperature annealing, and available materials are limited to insulating polyimide (PI), polyamide (PA), benzocyclobutene (BCB), poly-p-phenylenebenzobisoxazole (PBO) or the like. The capacity is thus limited to as small as 10 fF/μm2. The inductor (L) can only have an inductance of as small as 10 nH while being restricted by warping of the substrate, thin-film structure thereof, and technical limit of etching. The resistor (R) can be fabricated anyhow, but trimming will be necessary in a matching circuit, and this makes the incorporation unpractical. Another disadvantage resides in that the film formation for fabricating the L, C, R is carried out in separated processes, and this makes the device have a multi-layered substrate structure and increases the cost. On the other hand, the ceramic substrate, often composed of a low-temperature-cofired ceramic (LTCC), is difficult to be stacked with different kinds of materials, so that characteristics of the capacitor (C) are inevitably determined by a dielectric constant of an LTCC to be used therefor. It is also disadvantageous that use of a high-dielectric-constant material undesirably increases the delay time and ruins the high-frequency characteristics.